EP20K400CF672C7 vs EP20K400CF672C8ES Comparación
Comparación detallada lado a lado de EP20K400CF672C7 por Altera y EP20K400CF672C8ES por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400CF672C7 | EP20K400CF672C8ES |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $195,00 | $158,40 |
| Series | APEX-20KC | EP20K400 |
| Family | APEX 20KC (MultiCore™) | APEX 20KC |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (RAM bits) | 212,992 | — |
| Maximum User I/O | 488 | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] |
| Number of I/O Banks | 8 | — |
| Encapsulado | 672-BBGA (FC-FBGA, FineLine BGA) | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) |
| Recuento de pines | 672 | — |
| Core Voltage | 1.8 V | — |
| Tensión de alimentación | 2.5 V (I/O reference) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Propagation Delay (tPD) | 2.5 ns | — |
| Maximum Internal Frequency | 375.94 MHz | 301.21 MHz |
| Temperatura de funcionamiento | 0 °C to +85 °C (Commercial, C-grade) | 0°C to 85°C (Commercial) |
| PLL Count | 4 | — |
| Speed Grade | -7 | — |
| Tipo de montaje | Surface Mount (BGA) | — |
| Estado RoHS | Non-compliant (legacy product) | [DATA_NEEDED: not stated in verified data] |
| Lead-Free | Contains lead (legacy BGA finish) | — |
| Logic Cells / Macros | — | 16,640 |
| System Gates (typical) | — | 400,000 |
| System Gates (maximum) | — | 212,992 [DATA_NEEDED: confirm datasheet interpretation] |
| Bidirectional I/O | — | 484 |
| Propagation Delay | — | 2.5 ns |
| Nominal Supply Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore™ (LUT + Embedded System Block) |
| Programming Method | — | JTAG / in-system via configuration memory |