EP20K400CF672C7 vs EP20K400CF672C8ES 对比

详细并排对比 EP20K400CF672C7 出自 Altera 和 EP20K400CF672C8ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CF672C7 EP20K400CF672C8ES
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $195.00 $158.40
Series APEX-20KC EP20K400
Family APEX 20KC (MultiCore™) APEX 20KC
Logic Elements / Cells 16,640 —
System Gates 400,000 —
Embedded Memory (RAM bits) 212,992 —
Maximum User I/O 488 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value]
Number of I/O Banks 8 —
封装 672-BBGA (FC-FBGA, FineLine BGA) 672-BGA FineLine (FC-FBGA / S-PBGA-B672)
引脚数量 672 —
Core Voltage 1.8 V —
电源电压 2.5 V (I/O reference) —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Propagation Delay (tPD) 2.5 ns —
Maximum Internal Frequency 375.94 MHz 301.21 MHz
工作温度 0 °C to +85 °C (Commercial, C-grade) 0°C to 85°C (Commercial)
PLL Count 4 —
Speed Grade -7 —
安装类型 Surface Mount (BGA) —
RoHS 状态 Non-compliant (legacy product) [DATA_NEEDED: not stated in verified data]
Lead-Free Contains lead (legacy BGA finish) —
Logic Cells / Macros — 16,640
System Gates (typical) — 400,000
System Gates (maximum) — 212,992 [DATA_NEEDED: confirm datasheet interpretation]
Bidirectional I/O — 484
Propagation Delay — 2.5 ns
Nominal Supply Voltage — 1.8 V
Supply Voltage Range — 1.71 V to 1.89 V
Logic Family — CMOS
Architecture — MultiCore™ (LUT + Embedded System Block)
Programming Method — JTAG / in-system via configuration memory

数据手册与资源

浏览全部产品 创建 BOM 获取报价