EP20K400CF672C7N vs EP20K400CF672I7 Comparación
Comparación detallada lado a lado de EP20K400CF672C7N por Altera y EP20K400CF672I7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400CF672C7N | EP20K400CF672I7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $160,00 | $190,50 |
| Family | APEX 20KC | APEX 20KC |
| Maximum System Gates | 1,052,000 | 400,000 |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Embedded Memory | 488 Kbits | — |
| Maximum User I/O | 488 | — |
| User I/O (per catalog) | 480 / 502 (per source) | — |
| Encapsulado | 672-ball FineLine BGA (FC-FBGA / BBGA) | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Process Technology | 0.18-micron CMOS, all-layer copper interconnect | 0.15 um CMOS |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 3.3 V / 2.5 V banked | — |
| Propagation Delay | 2.5 ns (catalog) / 1.48 ns (some catalog) | — |
| Maximum Frequency | 375.94 MHz (internal) | — |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | -40 C to +85 C (industrial) |
| Tipo de montaje | Surface Mount (BGA) | — |
| Nivel MSL | 3 (per JEDEC J-STD-020) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not in provided data] | — |
| Configuration Modes | PS, PPS, JTAG | — |
| Logic Elements | — | 16,640 |
| Embedded Memory (ESB) | — | 212,992 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: pin count for CF672 package] |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| PLL Count | — | 4 |
| Speed Grade | — | I7 |
| Terminal Finish | — | Tin/Lead (Sn/Pb) |
| JESD-609 Code | — | e0 |
| Nivel de sensibilidad a la humedad (MSL) | — | 3 |
| Configuration Mode | — | PS / AS / JTAG (IEEE 1149.1) |