EP20K400FI784-2 vs EP20K400FC784-2 Comparación

Comparación detallada lado a lado de EP20K400FI784-2 por Altera y EP20K400FC784-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Comparación de especificaciones

Parámetro EP20K400FI784-2 EP20K400FC784-2
Marca Altera Altera
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Obsolete Obsolete
Estado del stock In Stock In Stock
Precio unitario (USD) $82,40 $175,00
Device Family APEX 20K —
Typical Gates 400,000 —
Logic Elements (LEs) [DATA_NEEDED: logic elements count] —
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] —
Maximum User I/O Pins [DATA_NEEDED: user I/O count] 488 (784-BGA)
Dedicated Inputs 4 —
Nominal Core Supply Voltage (VCCINT) 2.5 V —
VCCINT Range 2.375 V to 2.625 V —
Speed Grade -2 -2 (industrial)
Rango de temperatura de funcionamiento -40 °C to +100 °C —
Package Type S-PBGA-B784 (FineLine BGA) —
Package Pin Count 784 balls —
Ball Pitch 1.000 mm —
Tipo de montaje Surface Mount Surface Mount (BGA)
Estado RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not confirmed in provided data]
Lead-Free [DATA_NEEDED: lead-free status] —
Nivel MSL [DATA_NEEDED: MSL rating] 3 (per Partstack listing)
Device Form Factor Loadable PLD —
Process Technology [DATA_NEEDED: process node] 0.22 µm CMOS SRAM
Configuration Memory SRAM-based (volatile) —
Family — APEX 20K
Device Family Member — EP20K400C
Typical System Gates — 400,000
Logic Elements — 16,640
Embedded RAM (ESB) — 212 Kbits
Maximum Block RAM — [DATA_NEEDED: block RAM organization per ESB]
Maximum Frequency (internal) — [DATA_NEEDED: fmax, datasheet-dependent]
Core Voltage — 2.5 V
MultiVolt I/O Voltage — 1.8 V / 2.5 V / 3.3 V
Supported I/O Standards — LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT
Configuration Mode — Serial / Parallel SRAM-volatile (external PROM required)
Encapsulado — 784-Ball FineLine BGA (FC)
Temperatura de funcionamiento — [DATA_NEEDED: exact Tj range]
Peak Reflow Temperature — 220 °C (per Partstack listing)
Hot Socketing — Supported
JTAG / Boundary-Scan — IEEE 1149.1 compliant

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