EP20K400GI655-1 vs EP20K400GC655-1X Comparación
Comparación detallada lado a lado de EP20K400GI655-1 por Altera y EP20K400GC655-1X por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400GI655-1 | EP20K400GC655-1X |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $195,00 | $193,04 |
| Family | APEX 20K | — |
| Device Series | EP20K400 | — |
| Technology | CMOS, SRAM-based | CMOS |
| Logic Elements | 16640 | 16640 cells |
| Typical Gates | 400000 | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 655 | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Package Type | Ceramic Pin Grid Array (CPGA-655) | CPGA-655 (Ceramic Pin Grid Array) |
| JESD-30 Package Code | S-CPGA-P655 | — |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | — |
| Moisture Sensitivity Level | MSL 1 | — |
| Peak Reflow Temperature | 220 C | — |
| Programmability | In-system, JTAG boundary-scan (IEEE 1149.1) | — |
| Process Node | 0.18 micrometer CMOS | — |
| Estado RoHS | Compliant | unknown |
| Product Family | — | Altera APEX 20K |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Gate Count | — | 400K gates |
| Maximum System Frequency | — | 250 MHz |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V |
| Number of User I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of Terminals | — | 655 |
| Package Body Material | — | Ceramic |
| Process Technology | — | 0.22 um |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |