EP20K400GI655-1V vs EP20K400GI655-3V Comparación
Comparación detallada lado a lado de EP20K400GI655-1V por Intel y EP20K400GI655-3V por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Última compraIntel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V ObsoleteComparación de especificaciones
| Parámetro | EP20K400GI655-1V | EP20K400GI655-3V |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $155,00 | $142,50 |
| Family | APEX 20K | — |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | 16,640 |
| Maximum User I/O | 502 | 496 |
| Dedicated Inputs | 4 | 6 |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655, 47x47 | — |
| Process Technology | CMOS | — |
| Propagation Delay | 2.5 ns | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Configuration | In-system programmable via JTAG | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial vs military grade] | -40 °C to +85 °C (industrial) |
| Nivel MSL | 1 | — |
| Package Body Material | Ceramic | — |
| Estado RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20K |
| Device Family | — | EP20K400 |
| Typical Gate Count | — | 400,000 gates |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Total Embedded RAM | — | [DATA_NEEDED: total RAM bits] |
| Technology | — | CMOS (0.18 µm process) |
| Maximum Internal Clock Frequency | — | 714.2 MHz |
| Supply Voltage VCCINT | — | 2.5 V |
| I/O Supply Voltage VCCIO | — | 2.5 V or 3.3 V |
| Encapsulado | — | 655-pin SPGA (Staggered PGA), 47 x 47 mm |
| Tipo de montaje | — | Through-Hole (Pin Grid Array) |
| Nivel de sensibilidad a la humedad (MSL) | — | 1 |
| Qualification | — | Not Qualified |
| Configuration Interface | — | IEEE 1149.1 JTAG + serial / parallel passive |