EP20K400GI655-1V vs EP20K400GI655-3V Comparaison
Comparaison détaillée côte à côte de EP20K400GI655-1V par Intel et EP20K400GI655-3V par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Dernier achatIntel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V ObsoleteComparaison des spécifications
| Paramètre | EP20K400GI655-1V | EP20K400GI655-3V |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $155,00 | $142,50 |
| Family | APEX 20K | — |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | 16,640 |
| Maximum User I/O | 502 | 496 |
| Dedicated Inputs | 4 | 6 |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655, 47x47 | — |
| Process Technology | CMOS | — |
| Propagation Delay | 2.5 ns | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Configuration | In-system programmable via JTAG | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Température de fonctionnement | [DATA_NEEDED: industrial vs military grade] | -40 °C to +85 °C (industrial) |
| Niveau MSL | 1 | — |
| Package Body Material | Ceramic | — |
| Statut RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20K |
| Device Family | — | EP20K400 |
| Typical Gate Count | — | 400,000 gates |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Total Embedded RAM | — | [DATA_NEEDED: total RAM bits] |
| Technology | — | CMOS (0.18 µm process) |
| Maximum Internal Clock Frequency | — | 714.2 MHz |
| Supply Voltage VCCINT | — | 2.5 V |
| I/O Supply Voltage VCCIO | — | 2.5 V or 3.3 V |
| Boîtier | — | 655-pin SPGA (Staggered PGA), 47 x 47 mm |
| Type de montage | — | Through-Hole (Pin Grid Array) |
| Niveau de sensibilité à l'humidité (MSL) | — | 1 |
| Qualification | — | Not Qualified |
| Configuration Interface | — | IEEE 1149.1 JTAG + serial / parallel passive |