EP20K600CF1020C9 vs EP20K600CF33C9 Comparación
Comparación detallada lado a lado de EP20K600CF1020C9 por Intel y EP20K600CF33C9 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K600CF1020C9 - APEX 20KC FPGA 600K Gates 250MHz 1020-FBGA | Intel
EP20K600CF1020C9 ObsoleteComparación de especificaciones
| Parámetro | EP20K600CF1020C9 | EP20K600CF33C9 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $165,00 | $171,00 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 | — |
| System Gates | 600,000 | 600,000 (maximum) |
| Maximum Operating Frequency | 250 MHz | 250 MHz |
| Embedded Memory (ESB) | Configurable dual-port RAM / FIFO / CAM / ROM | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Internal Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| User I/O Pins | 588 | — |
| Dedicated Inputs | 4 | — |
| Total I/O Count (in/out) | 580 / 580 | — |
| Encapsulado | 1020-ball FC-FBGA (33 x 33 mm, 1.00 mm pitch) | 1020-ball FC-FBGA |
| JESD-30 Package Code | S-PBGA-B1020 | — |
| Temperatura de funcionamiento | 0°C to 85°C (TJ) | — |
| PCI Compliance | PCI Local Bus Spec Rev 2.2 (33/66 MHz, 32/64-bit, 3.3 V) | — |
| External Memory Support | DDR SDRAM, ZBT SRAM | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Logic Elements / Cells | — | 24,320 |
| Frecuencia de reloj máxima | — | 303.03 MHz |
| Propagation Delay | — | 2.0 ns |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| User I/O | — | 588 (4 dedicated inputs + 580 general-purpose I/O) |
| Tipo de montaje | — | Surface Mount (BGA) |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM | — | Dual-port RAM blocks (per family) |
| Programmability | — | JTAG / IEEE 1149.1 ISP, SRAM-based |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Logic Block Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS (per family datasheet) |