EP20K600EFC144-2XN vs EP20K600CF672C8N Comparación
Comparación detallada lado a lado de EP20K600EFC144-2XN por Altera y EP20K600CF672C8N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K600EFC144-2XN | EP20K600CF672C8N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $115,00 | $108,00 |
| Family | APEX 20KE | APEX 20KC |
| Logic Elements | 24,576 | — |
| Typical Gates | 600,000 | — |
| Maximum System Gates | 1,053,840 | — |
| Embedded RAM Bits | 311,040 bits (~38 KB) | — |
| Number of ESBs (Embedded System Blocks) | [DATA_NEEDED: ESB count] | — |
| Number of Multiplier Blocks | [DATA_NEEDED: multiplier count] | — |
| Number of PLLs | 4 | — |
| Number of I/O Pins | [DATA_NEEDED: usable I/O count] | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Banks | Multi-voltage (LVTTL/LVCMOS/PCI) | — |
| Process Technology | 0.18 um CMOS, 6-layer metal | — |
| Speed Grade | -2 (mid-tier) | — |
| Encapsulado | 144-ball FineLine BGA | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Temperatura de funcionamiento | -40C to +85C (industrial, 'N' suffix) | 0°C to 85°C |
| Estado RoHS | [DATA_NEEDED: RoHS] | unknown |
| Configuration Method | SRAM, IEEE 1532 / passive serial / passive parallel | [DATA_NEEDED: configuration memory and programming method] |
| Device Type | — | SPLD |
| Product Type | — | FPGA / programmable logic device |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Package Description | — | 672-pin FC-FBGA |
| Tensión de alimentación | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.48 ns |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| Tipo de montaje | — | Surface mount |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Resistencia térmica | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |