EP2A40B724C7N vs EP2A40B724C8ES Comparación
Comparación detallada lado a lado de EP2A40B724C7N por Intel y EP2A40B724C8ES por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40B724C7N | EP2A40B724C8ES |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $175,00 | $162,00 |
| Family | APEX II | Field Programmable Gate Array (FPGA) |
| Series | EP2A40 | APEX II (EP2A) |
| Device Type | FPGA (Loadable PLD) | — |
| System Gates | 1.5 M | — |
| Logic Cells / Elements | 38,400 | — |
| Maximum Internal Performance | 562 MHz | — |
| Propagation Delay | 1.55 ns | — |
| Process Technology | 0.15 um CMOS | — |
| Core Supply Voltage (VCCINT) | 1.5 V nominal (1.425 V to 1.575 V) | — |
| User I/O Lines | 536 | — |
| Encapsulado | 724-pin FCBGA (PBGA) | 724-BBGA / FCBGA |
| JESD-30 Package Code | S-PBGA-B724 | — |
| Terminal Count | 724 | — |
| Output Function | MACROCELL | — |
| Rango de temperatura de funcionamiento | 0 C to 85 C (commercial) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Logic Elements / Cells | — | 38,400 |
| Number of Gates (typical) | — | 655,360 |
| Number of I/O | — | 540 |
| Speed Grade | — | -8 (C8) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Nivel MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |
| Tensión de alimentación | — | [DATA_NEEDED: VCCINT / VCCIO core and I/O voltages] |
| Process Node | — | [DATA_NEEDED: CMOS process technology] |
| Embedded Memory | — | Embedded System Blocks (ESB) |
| Programmable Logic Type | — | SRAM-based, in-system reconfigurable |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | MultiCore interconnect with LABs and ESBs |