EP2A40B724I-9 vs EP2A40B724I-7 Comparación
Comparación detallada lado a lado de EP2A40B724I-9 por Altera y EP2A40B724I-7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40B724I-9 | EP2A40B724I-7 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $605,00 | $158,00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 (typical) | 40,000 LE |
| Logic Cells | 38400 | — |
| Embedded Memory Bits | 655360 | — |
| Maximum User I/O | 540 (per EP2A40B724 family) | [DATA_NEEDED: max user I/O count] |
| Encapsulado | 724-ball FCBGA / FineLine BGA | BGA-724 (724-ball FineLine BGA) |
| Package Code | B724 | — |
| Temperature Grade | Industrial ('I' suffix) | — |
| Temperatura de unión de funcionamiento | -40 C to +100 C (industrial) | — |
| Speed Grade | -9 (per APEX II speed bin) | -7 |
| Peak Reflow Temperature | 220 C | 220 C |
| Core Voltage | 1.5 V (typical APEX II) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL | — |
| Configuration Interface | JTAG, Passive Serial | — |
| PLL | On-chip (per APEX II architecture) | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Nivel MSL | [DATA_NEEDED: msl level] | [DATA_NEEDED: MSL level] |
| Embedded Memory | — | 1.5 Mbit (ESB) |
| Number of PLLs | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Package Footprint | — | 33 x 33 mm |
| Ball Pitch | — | 1.27 mm |
| Tipo de montaje | — | Surface Mount (BGA) |
| Configuration Mode | — | Enhanced configuration device / fast serial |
| Process Technology | — | [DATA_NEEDED: process node] |
| I/O Standard Support | — | LVTTL / LVCMOS 1.5V, 1.8V, 2.5V, 3.3V |