EP2A40B724I-9 vs EP2A40B724I-7 Comparaison
Comparaison détaillée côte à côte de EP2A40B724I-9 par Altera et EP2A40B724I-7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40B724I-9 | EP2A40B724I-7 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $605,00 | $158,00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 (typical) | 40,000 LE |
| Logic Cells | 38400 | — |
| Embedded Memory Bits | 655360 | — |
| Maximum User I/O | 540 (per EP2A40B724 family) | [DATA_NEEDED: max user I/O count] |
| Boîtier | 724-ball FCBGA / FineLine BGA | BGA-724 (724-ball FineLine BGA) |
| Package Code | B724 | — |
| Temperature Grade | Industrial ('I' suffix) | — |
| Température de jonction en fonctionnement | -40 C to +100 C (industrial) | — |
| Speed Grade | -9 (per APEX II speed bin) | -7 |
| Peak Reflow Temperature | 220 C | 220 C |
| Core Voltage | 1.5 V (typical APEX II) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL | — |
| Configuration Interface | JTAG, Passive Serial | — |
| PLL | On-chip (per APEX II architecture) | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Niveau MSL | [DATA_NEEDED: msl level] | [DATA_NEEDED: MSL level] |
| Embedded Memory | — | 1.5 Mbit (ESB) |
| Number of PLLs | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Package Footprint | — | 33 x 33 mm |
| Ball Pitch | — | 1.27 mm |
| Type de montage | — | Surface Mount (BGA) |
| Configuration Mode | — | Enhanced configuration device / fast serial |
| Process Technology | — | [DATA_NEEDED: process node] |
| I/O Standard Support | — | LVTTL / LVCMOS 1.5V, 1.8V, 2.5V, 3.3V |