EP2A40F1020C9ES vs EP2A40F1020C7ES Comparación
Comparación detallada lado a lado de EP2A40F1020C9ES por Altera y EP2A40F1020C7ES por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP2A40F1020C9ES - APEX II FPGA 1.5M Gates 38400 Cells 366MHz | Altera
EP2A40F1020C9ES ObsoleteComparación de especificaciones
| Parámetro | EP2A40F1020C9ES | EP2A40F1020C7ES |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $98,00 | $185,00 |
| Family | APEX II | APEX II |
| System Gates | 1.5 M | — |
| Logic Cells / Elements | 38,400 | — |
| Maximum Internal Clock Frequency | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Core Supply Voltage | 1.5 V | — |
| Encapsulado | 1020-pin FC-FBGA | 1020-pin FC-FBGA |
| Package Type | Flip-Chip Fine-Pitch Ball Grid Array | — |
| Tipo de montaje | Surface Mount | Surface Mount (FC-FBGA) |
| Embedded Memory | Embedded System Blocks (ESBs) - RAM/ROM | 655,360 bits |
| I/O Standards | LVDS and other high-speed standards (per family datasheet) | LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V |
| RAM Support | Synchronous and asynchronous | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: commercial/industrial grade] |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 38,400 |
| Typical Gates | — | 1,500,000 |
| Maximum User I/O | — | 735 |
| Maximum Frequency | — | 562 MHz |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | C7 (with ES enhanced speed suffix) |
| High-Speed Interface | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | — | Up to 8 (per datasheet family feature) |
| Programming Interface | — | JTAG (IEEE 1149.1), passive serial |