EP2A40F1020I8N vs EP2A40F1020I9N Comparación
Comparación detallada lado a lado de EP2A40F1020I8N por Intel y EP2A40F1020I9N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F1020I8N | EP2A40F1020I9N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $125,40 | $165,00 |
| Family | APEX II (EP2A40) | APEX II |
| Logic Elements | 38,400 cells | — |
| System Gates | 1.5 M (typical) | 1,500,000 (1.5 M) |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS, up to 8 metal layers |
| Core Voltage | 1.5 V | — |
| Maximum Internal Frequency | 376 MHz | — |
| User I/O Count | 735 (maximum) | 735 bidirectional I/O |
| Encapsulado | 1020-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | 1020-pin FC-FBGA (Flip-Chip FineLine BGA) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (-40 C to +100 C) / 'I' suffix | Industrial (I9 suffix: -40C to +100C per Altera APEX II convention) |
| Speed Grade | 8 | — |
| Architecture | LUT-based with embedded system blocks (ESBs) | — |
| Configuration | SRAM-based, JTAG / passive serial / passive parallel | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Total Embedded Memory | [DATA_NEEDED: embedded memory bits] | — |
| Device Logic Elements / Cells | — | 38,400 cells |
| Maximum Operating Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| High-Speed I/O Standards | — | True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport |
| Embedded Memory | — | ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits]) |
| Clock Management | — | PLLs (count [DATA_NEEDED: PLL count]) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG |
| Estado del ciclo de vida | — | Obsolete (per distributor listings / Altera APEX II family EOL) |