EP2A40F672C6 vs EP2A40F780 Comparación
Comparación detallada lado a lado de EP2A40F672C6 por Altera y EP2A40F780 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F672C6 | EP2A40F780 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $105,00 | $142,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | EP2A40 |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | [DATA_NEEDED: maximum user I/O count] |
| Encapsulado | 672-ball FineLine BGA (FBGA-672) | 780-ball FineLine BGA (FBGA) |
| Speed Grade | C6 (commercial) | — |
| Temperatura de funcionamiento | Commercial (0C to +85C) | [DATA_NEEDED: temperature grade] |
| Process Technology | 0.18-micron CMOS | [DATA_NEEDED: process node] |
| Configuration Memory | SRAM-based | SRAM-based |
| JTAG Support | Yes (IEEE 1149.1) | IEEE 1149.1 boundary-scan |
| PLL Support | Yes | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Typical Gates | — | 1,500,000 |
| Logic Elements | — | 30,000 |
| Programming File Format | — | .sof/.pof via Quartus II |
| Core Voltage | — | [DATA_NEEDED: VCCINT] |
| I/O Voltage | — | [DATA_NEEDED: VCCIO range] |