EP2A40F672C6 vs EP2A40F780 Comparaison
Comparaison détaillée côte à côte de EP2A40F672C6 par Altera et EP2A40F780 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672C6 | EP2A40F780 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $142,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | EP2A40 |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | [DATA_NEEDED: maximum user I/O count] |
| Boîtier | 672-ball FineLine BGA (FBGA-672) | 780-ball FineLine BGA (FBGA) |
| Speed Grade | C6 (commercial) | — |
| Température de fonctionnement | Commercial (0C to +85C) | [DATA_NEEDED: temperature grade] |
| Process Technology | 0.18-micron CMOS | [DATA_NEEDED: process node] |
| Configuration Memory | SRAM-based | SRAM-based |
| JTAG Support | Yes (IEEE 1149.1) | IEEE 1149.1 boundary-scan |
| PLL Support | Yes | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Typical Gates | — | 1,500,000 |
| Logic Elements | — | 30,000 |
| Programming File Format | — | .sof/.pof via Quartus II |
| Core Voltage | — | [DATA_NEEDED: VCCINT] |
| I/O Voltage | — | [DATA_NEEDED: VCCIO range] |