EP2A40F672I9N vs EP2A25F672I9N Comparación
Comparación detallada lado a lado de EP2A40F672I9N por Altera y EP2A25F672I9N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F672I9N | EP2A25F672I9N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.395,00 | $215,00 |
| Family | APEX II | APEX II |
| Technology | 0.15 um CMOS | — |
| Logic Elements | 38400 cells | — |
| System Gates | 1.5 M | 900,000 (typical) |
| Maximum Operating Frequency | 366 MHz | — |
| Core Supply Voltage | 1.5 V | — |
| User I/O Count | 492 | — |
| Embedded Memory | [DATA_NEEDED: total ESB bits] | — |
| Encapsulado | 672-ball FC-FBGA | 672-pin FC-FBGA |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| True-LVDS Data Rate | 840 Mbps per channel | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG, EPC device | — |
| Temperature Grade | Industrial -40C to +100C (I9 suffix) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS compliance of I9N suffix] | [DATA_NEEDED: confirmed] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | APEX II (EP2A25) |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Logic Elements / Cells | — | 24,320 |
| Process Technology | — | 0.15 µm CMOS |
| Maximum Internal Frequency | — | 236 MHz |
| Propagation Delay (tpd) | — | 2.23 ns |
| Core Supply Voltage (VCCINT) | — | 1.5 V nominal (1.425 V to 1.525 V) |
| I/O Supply Voltage | — | [DATA_NEEDED: VCCIO range] |
| Temperatura de funcionamiento | — | -40 °C to +85 °C (Industrial, 'I' suffix) |
| Speed Grade | — | 9 (fastest commercial APEX II) |
| Embedded System Blocks (ESB) | — | Yes (on-chip RAM/ROM) |
| PLLs | — | 4 |
| Configuration | — | JTAG / in-system programmable |
| Nivel MSL | — | [DATA_NEEDED] |
| AEC-Q100 | — | not_applicable |