EP2AGX95EF35C4G vs EP2AGX125EF35C4G Comparación
Comparación detallada lado a lado de EP2AGX95EF35C4G por Intel y EP2AGX125EF35C4G por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G ⚠ Última compraComparación de especificaciones
| Parámetro | EP2AGX95EF35C4G | EP2AGX125EF35C4G |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.555,00 | $1.290,00 |
| Family | Arria II GX | Arria II GX |
| Logic Elements (LE) | 89,178 | — |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count from datasheet] | — |
| Embedded Memory Bits | 6,839,296 bits (~6.5 Mbit) | 8,315,904 |
| Embedded Memory Blocks (M9K/M144K) | [DATA_NEEDED: block count from datasheet] | — |
| Embedded 18x18 Multipliers | 616 | — |
| User I/Os | 452 | — |
| Transceiver Blocks | 4 (up to 3.75 Gbps) | — |
| PCIe Hard IP | Gen1/Gen2 (x1/x2/x4) | — |
| PLLs | 4 | — |
| Global Clock Networks | [DATA_NEEDED: per Arria II family datasheet] | — |
| Process Technology | 40 nm TSMC low-power | 40 nm |
| Speed Grade | -4 (mid-speed) | C4 |
| Temperatura de funcionamiento | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Encapsulado | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch | 1152-ball FC-FBGA (Flip-Chip) |
| Configuration Mode | Passive Serial, Fast Passive Parallel, JTAG | — |
| Core Voltage | 0.9 V nominal | 0.9 V |
| Estado RoHS | Compliant | Compliant |
| Logic Elements | — | 118,143 |
| Memory Blocks (M9K) | — | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | — | 452 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | — | 12 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| PCI Express Hard IP | — | Gen1/Gen2 x1/x4/x8 |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Tipo de montaje | — | Surface Mount |
| Configuration Method | — | SRAM-based, PS/FPP/JTAG |
| Lead-Free | — | Yes |