EP2S15F672C5 vs EP2S15F672C5N Comparación
Comparación detallada lado a lado de EP2S15F672C5 por Intel y EP2S15F672C5N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S15F672C5 | EP2S15F672C5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $199,00 | $121,90 |
| Family | Stratix II | Stratix II |
| Series | EP2S15 | Altera Stratix II |
| Logic Elements | 15,600 | 15,600 |
| CLBs | 6,240 | — |
| Memory Bits | 419,328 | — |
| Maximum User I/O | 366 | — |
| Operating Frequency (max) | 640 MHz | — |
| Speed Grade | -5 (mid-tier) | -C5 |
| Package Type | 672-ball FineLine BGA (FBGA) | — |
| Package Dimensions | 27 mm x 27 mm | 35 x 35 mm |
| Ball Pitch | 1 mm | 1.0 mm |
| Process Technology | 90 nm CMOS | — |
| Voltage - Supply (VCCINT) | [DATA_NEEDED: VCCINT nominal] | — |
| Temperatura de funcionamiento | Commercial (0C to +85C) | 0C to +85C (commercial) |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Estado RoHS | Compliant (legacy lead-free version exists) | RoHS Compliant |
| Tipo de montaje | Surface Mount | — |
| Logic Array Blocks (LABs) | — | 780 |
| Configurable Logic Blocks (CLBs) | — | 6,240 |
| Embedded Memory (bits) | — | 419,328 |
| User I/O Pins | — | 366 |
| Encapsulado | — | 672-BBGA / FBGA-672 |
| Maximum Internal Frequency | — | 640 MHz |
| Lead-Free (Pb-Free) | — | Yes |