EP2S15F672C5 vs EP2S15F672C5N 对比
详细并排对比 EP2S15F672C5 出自 Intel 和 EP2S15F672C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S15F672C5 | EP2S15F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $199.00 | $121.90 |
| Family | Stratix II | Stratix II |
| Series | EP2S15 | Altera Stratix II |
| Logic Elements | 15,600 | 15,600 |
| CLBs | 6,240 | — |
| Memory Bits | 419,328 | — |
| Maximum User I/O | 366 | — |
| Operating Frequency (max) | 640 MHz | — |
| Speed Grade | -5 (mid-tier) | -C5 |
| Package Type | 672-ball FineLine BGA (FBGA) | — |
| Package Dimensions | 27 mm x 27 mm | 35 x 35 mm |
| Ball Pitch | 1 mm | 1.0 mm |
| Process Technology | 90 nm CMOS | — |
| Voltage - Supply (VCCINT) | [DATA_NEEDED: VCCINT nominal] | — |
| 工作温度 | Commercial (0C to +85C) | 0C to +85C (commercial) |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| RoHS 状态 | Compliant (legacy lead-free version exists) | RoHS Compliant |
| 安装类型 | Surface Mount | — |
| Logic Array Blocks (LABs) | — | 780 |
| Configurable Logic Blocks (CLBs) | — | 6,240 |
| Embedded Memory (bits) | — | 419,328 |
| User I/O Pins | — | 366 |
| 封装 | — | 672-BBGA / FBGA-672 |
| Maximum Internal Frequency | — | 640 MHz |
| Lead-Free (Pb-Free) | — | Yes |