EP3SE260F1152C3 vs EP3SE110F1152C3N Comparación
Comparación detallada lado a lado de EP3SE260F1152C3 por Intel y EP3SE110F1152C3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP3SE260F1152C3 - 255K LEs Stratix III E FPGA | Intel / Altera
EP3SE260F1152C3 ⚠ Última compraIntel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ Última compraComparación de especificaciones
| Parámetro | EP3SE260F1152C3 | EP3SE110F1152C3N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $12.500,00 | $1.560,00 |
| Series | Stratix III E | Stratix III |
| Logic Elements | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Logic Array Blocks (LABs) | 10,200 | 4,300 |
| User I/Os | 744 | 744 |
| Embedded 18x18 Multipliers | 384 | — |
| Encapsulado | 1152-ball FCBGA (Flip-Chip BGA) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Core Voltage | 0.9 V to 1.1 V | — |
| Process Technology | 40 nm | 65 nm TSMC |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0 °C to 85 °C (commercial) |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| PLLs | 12 | — |
| Estado RoHS | Compliant | — |
| Speed Grade | C3 | C3 |
| Family | — | Stratix III E |
| Logic Elements (LE) | — | 107,500 |
| Total RAM Bits | — | 8,936,448 |
| Operating Frequency (max) | — | 500 MHz |
| Core Supply Voltage | — | 1.1 V nominal |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply range] |
| Package Type | — | FC-FBGA-1152 (flip-chip BGA) |
| Estilo de montaje | — | SMD/SMT (Tray) |
| DSP Blocks | — | Yes (embedded multipliers) |
| Tipo de memoria | — | M9K and M144K block RAM |
| External Memory Support | — | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | Yes (per Altera/Intel datasheet family convention) |