EP3SE260F1152C3 vs EP3SE110F1152C3N Comparaison
Comparaison détaillée côte à côte de EP3SE260F1152C3 par Intel et EP3SE110F1152C3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SE260F1152C3 - 255K LEs Stratix III E FPGA | Intel / Altera
EP3SE260F1152C3 ⚠ Dernier achatIntel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP3SE260F1152C3 | EP3SE110F1152C3N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $12 500,00 | $1 560,00 |
| Series | Stratix III E | Stratix III |
| Logic Elements | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Logic Array Blocks (LABs) | 10,200 | 4,300 |
| User I/Os | 744 | 744 |
| Embedded 18x18 Multipliers | 384 | — |
| Boîtier | 1152-ball FCBGA (Flip-Chip BGA) | — |
| Type de montage | Surface Mount | Surface Mount |
| Core Voltage | 0.9 V to 1.1 V | — |
| Process Technology | 40 nm | 65 nm TSMC |
| Température de fonctionnement | 0C to +85C (Commercial) | 0 °C to 85 °C (commercial) |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| PLLs | 12 | — |
| Statut RoHS | Compliant | — |
| Speed Grade | C3 | C3 |
| Family | — | Stratix III E |
| Logic Elements (LE) | — | 107,500 |
| Total RAM Bits | — | 8,936,448 |
| Operating Frequency (max) | — | 500 MHz |
| Core Supply Voltage | — | 1.1 V nominal |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply range] |
| Package Type | — | FC-FBGA-1152 (flip-chip BGA) |
| Style de montage | — | SMD/SMT (Tray) |
| DSP Blocks | — | Yes (embedded multipliers) |
| Type de mémoire | — | M9K and M144K block RAM |
| External Memory Support | — | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | Yes (per Altera/Intel datasheet family convention) |