EP3SE80F1152C2 vs EP3SE260F1152C3N Comparación
Comparación detallada lado a lado de EP3SE80F1152C2 por Intel y EP3SE260F1152C3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP3SE260F1152C3N - Stratix III E FPGA, 255K LE, 744 I/O, 1152-FBGA | Intel
EP3SE260F1152C3N ✓ ActivoComparación de especificaciones
| Parámetro | EP3SE80F1152C2 | EP3SE260F1152C3N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.325,00 | $7.500,00 |
| Family | Stratix III E | — |
| Logic Elements | 80,000 | — |
| Logic Array Blocks (LABs) | 3,200 | 10,200 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory Bits | 6,843,392 | 16,672,768 bits |
| User I/Os | 744 | — |
| Process Technology | 65 nm | 65 nm |
| Core Voltage (VCCINT) | 1.1 V | — |
| Internal Operating Frequency | up to 600 MHz | — |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | C2 | — |
| Encapsulado | 1152-ball FC-FBGA (Flip Chip FineLine BGA) | 1152-BBGA, FCBGA |
| Package Code | F1152 | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| Series | — | Stratix III E |
| Logic Elements / Cells | — | 255,000 |
| User I/O Count | — | 744 |
| Core Voltage | — | 1.1 V |
| Transceivers | — | Integrated high-speed transceivers |
| DSP Blocks | — | Yes (dedicated multiplier/accumulator) |
| Embedded Memory Type | — | TriMatrix (true dual-port, FIFO, ROM, RAM) |
| External Memory Support | — | DDR3, DDR2, QDR II+, RLDRAM II |
| Configuration Modes | — | AS, AP, PS, FPP, JTAG |
| Partial Reconfiguration | — | Supported |
| Programmable Power Technology | — | Yes (up to 50% dynamic power reduction) |