EP3SL340H1152I4 vs EP3SL340H1152I4L Comparación
Comparación detallada lado a lado de EP3SL340H1152I4 por Intel y EP3SL340H1152I4L por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP3SL340H1152I4 | EP3SL340H1152I4L |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15.100,00 | $4.100,00 |
| Series | Stratix III L | — |
| Logic Elements (LE) | 337,500 | — |
| Embedded Memory | 18,821,440 bits | M9K + M144K blocks |
| User I/O Pins | 744 | 744 |
| Logic Array Blocks (LABs) | 13,500 | 13,500 |
| Operating Frequency | 717 MHz (max fabric speed) | — |
| Process Technology | 65 nm CMOS | — |
| Core Voltage | 1.1 V | 0.9 V |
| Encapsulado | 1152-ball FCBGA / HBGA | 1152-ball FC-HFBGA (FCBGA) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (I4: -40C to +100C junction) | — |
| I/O Standards Supported | LVDS, LVPECL, HSTL, SSTL, LVCMOS, LVTTL | — |
| Memory Interface Hard IP | DDR / DDR2 / DDR3 SDRAM controllers with PHY | — |
| Estado RoHS | Compliant | Compliant (per Intel/Altera product page) |
| Lead-Free | Yes | Yes (Pb-free BGA balls) |
| Family | — | Stratix III L |
| Logic Elements | — | 337,500 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Total Memory Bits | — | 18,221,440 bits |
| DSP Blocks (18x18 Multipliers) | — | [DATA_NEEDED: multiplier count] |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Process Node | — | 65 nm |
| Temperatura de funcionamiento | — | -40C to +100C (industrial) |
| Speed Grade | — | 4 |
| PLLs | — | [DATA_NEEDED: PLL count] |
| High-Speed Transceivers | — | [DATA_NEEDED: transceiver count] |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |
| Configuration | — | FPGA, SRAM-based, in-system programmable |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |