EP4SGX110DF29C3G vs EP4SGX110DF29C2XG Comparación
Comparación detallada lado a lado de EP4SGX110DF29C3G por Intel y EP4SGX110DF29C2XG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP4SGX110DF29C2XG - Stratix IV GX FPGA, 105.6K LEs, 780-FCBGA | Intel
EP4SGX110DF29C2XG ✓ ActivoComparación de especificaciones
| Parámetro | EP4SGX110DF29C3G | EP4SGX110DF29C2XG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2.610,50 | $1.265,00 |
| Series | Stratix IV GX | Stratix IV GX |
| Family | Stratix IV GX | — |
| Logic Elements | 105,600 | — |
| Adaptive Logic Modules (ALMs) | 4,224 LABs | — |
| Total Memory Bits | 9,793,536 | 9,793,536 |
| User I/O Count | 372 | 372 |
| Package Type | 780-BBGA, FCBGA (Flip-Chip) | — |
| Package Pin/Ball Count | 780 | — |
| Tensión de alimentación | 0.9 V core | — |
| Process Technology | 40 nm | 40 nm |
| Transceiver Data Rate | Up to 8.5 Gbps | — |
| Transceiver Count | [DATA_NEEDED: number of transceivers] | — |
| DSP Blocks | 266 (18x18 multipliers) | — |
| Temperatura de funcionamiento | Commercial (0C to +85C) - per C3 grade suffix | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Tipo de montaje | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements (LEs) | — | 105,600 |
| Encapsulado | — | 780-FCBGA (29 mm) |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Supply Voltage - Core | — | [DATA_NEEDED: core supply voltage] |
| Multi-Gigabit Transceivers | — | Yes (GX series, hard PCS) |
| Embedded DSP Blocks | — | Yes (variable-precision) |
| External Memory Interface | — | DDR/DDR2/DDR3, QDR II/II+, RLDRAM II |
| Hard PCIe IP | — | Yes (PCIe Gen1/Gen2 hard IP) |
| Configuration Method | — | FPGA configuration flash / JTAG |