EP610LC-15 vs EP610DC-25 Comparación
Comparación detallada lado a lado de EP610LC-15 por Altera y EP610DC-25 por Rochester Electronics. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ ActivoComparación de especificaciones
| Parámetro | EP610LC-15 | EP610DC-25 |
|---|---|---|
| Marca | Altera | Rochester Electronics |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,65 | $9,95 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP610) | Altera Classic EPLD |
| Logic Elements / Macrocells | 16 macrocells | — |
| Equivalent Gates | 300 gates | 300 |
| Propagation Delay (tpd) | 15 ns | — |
| Counter Frequency (fmax) | 83.3 MHz | — |
| Pipelined Data Rate | up to 100 MHz | Up to 100 MHz |
| Supply Voltage (Vcc) | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Encapsulado | 28-pin PLCC (J-lead, plastic OTP) | 24-pin CDIP (Ceramic DIP, through-hole) |
| Tipo de montaje | Surface Mount | Through Hole |
| Número de pines | 28 | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] | 0 C to +70 C |
| Programming | OTP (one-time programmable) | — |
| Estado RoHS | unknown | — |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Macrocells | — | 16 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Number of I/O Pins | — | 22 |
| Number of Dedicated Inputs | — | 4 |
| Total Pin Count | — | 24 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Technology | — | CMOS EPROM (UV-erasable) |
| Programming Method | — | JEDEC fuse-map / UV-erase |
| Speed Grade Suffix | — | -25 (25 ns tPD) |