EP910ILI-25 vs EP910ILC-25 Comparación
Comparación detallada lado a lado de EP910ILI-25 por Altera y EP910ILC-25 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910ILI-25 | EP910ILC-25 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,25 | $9,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | EP910 (Classic EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Product Terms | 240 (maximum) | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Technology | CMOS, EPROM | CMOS EPROM (UV-erasable) |
| Architecture | PAL-type with global interconnect bus | — |
| Encapsulado | PLCC-44 (windowed ceramic, J-lead) | 44-pin JLCC (windowed ceramic) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | — |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | — |
| Logic Test Circuitry | On-board JTAG-compatible test | — |
| Estado RoHS | Non-compliant (windowed ceramic package) | non_compliant (ceramic windowed package) |
| Family | — | EP910 Classic EPLD |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Tipo de montaje | — | Surface Mount |
| Tensión de alimentación | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Estado del ciclo de vida | — | Obsolete - last time buy was late 1990s |