EP910ILI-25 vs EP910ILC-25 Comparaison
Comparaison détaillée côte à côte de EP910ILI-25 par Altera et EP910ILC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910ILI-25 | EP910ILC-25 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,25 | $9,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | EP910 (Classic EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Product Terms | 240 (maximum) | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Technology | CMOS, EPROM | CMOS EPROM (UV-erasable) |
| Architecture | PAL-type with global interconnect bus | — |
| Boîtier | PLCC-44 (windowed ceramic, J-lead) | 44-pin JLCC (windowed ceramic) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | — |
| Température de fonctionnement | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | — |
| Logic Test Circuitry | On-board JTAG-compatible test | — |
| Statut RoHS | Non-compliant (windowed ceramic package) | non_compliant (ceramic windowed package) |
| Family | — | EP910 Classic EPLD |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Type de montage | — | Surface Mount |
| Tension d'alimentation | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Statut du cycle de vie | — | Obsolete - last time buy was late 1990s |