EP910IPC-25 vs EP910LI-20 Comparación
Comparación detallada lado a lado de EP910IPC-25 por Intel y EP910LI-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910IPC-25 | EP910LI-20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $19,95 |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Manufacturer | Altera (now Intel) | — |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | Sum-of-products macrocell |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Frequency (fMAX) | 40 MHz | — |
| Dedicated Inputs | 12 | 16 |
| Bidirectional I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| Temperatura de funcionamiento | 0C to +70C (commercial grade) | -40C to +85C (Industrial) |
| Encapsulado | 40-pin PDIP (PDIP-40) | 40-pin Ceramic DIP (Windowed) |
| Tipo de montaje | Through-Hole | — |
| Programming Method | EPROM cell (OTP / UV erasable) | — |
| Development Tool | MAX+PLUS II | — |
| Maximum Operating Frequency | — | 62 MHz |
| Propagation Delay (tpd) | — | 20 ns |
| I/O Pins | — | 24 |
| Technology | — | CMOS, UV-erasable |
| Package Type | — | Through-Hole, Ceramic DIP with Quartz Window |
| Temperature Grade | — | Industrial (-40C to +85C) |
| Recuento de pines | — | 40 |
| Logic Family | — | EPLD (Erasable PLD) |
| Pin/Package Compatibility | — | Pin-compatible across EP910 family |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |