EP910IPC-25 vs EP910LI-20 Comparaison
Comparaison détaillée côte à côte de EP910IPC-25 par Intel et EP910LI-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910IPC-25 | EP910LI-20 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,40 | $19,95 |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Manufacturer | Altera (now Intel) | — |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | Sum-of-products macrocell |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Frequency (fMAX) | 40 MHz | — |
| Dedicated Inputs | 12 | 16 |
| Bidirectional I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| Température de fonctionnement | 0C to +70C (commercial grade) | -40C to +85C (Industrial) |
| Boîtier | 40-pin PDIP (PDIP-40) | 40-pin Ceramic DIP (Windowed) |
| Type de montage | Through-Hole | — |
| Programming Method | EPROM cell (OTP / UV erasable) | — |
| Development Tool | MAX+PLUS II | — |
| Maximum Operating Frequency | — | 62 MHz |
| Propagation Delay (tpd) | — | 20 ns |
| I/O Pins | — | 24 |
| Technology | — | CMOS, UV-erasable |
| Package Type | — | Through-Hole, Ceramic DIP with Quartz Window |
| Temperature Grade | — | Industrial (-40C to +85C) |
| Nombre de broches | — | 40 |
| Logic Family | — | EPLD (Erasable PLD) |
| Pin/Package Compatibility | — | Pin-compatible across EP910 family |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |