EP910LC-25 vs EP910LC-35 Comparación
Comparación detallada lado a lado de EP910LC-25 por Intel y EP910LC-35 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-25 | EP910LC-35 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,20 | $18,75 |
| Family | Altera Classic EPLD | Classic (EP910) |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | 35 ns |
| Dedicated Inputs | 16 | — |
| Encapsulado | 28-pin PLCC (LC suffix) | PLCC-44 (J-lead, LC suffix) |
| Tipo de montaje | Surface Mount | — |
| Technology | CMOS (EPROM-based) | CMOS EPROM |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Not applicable (legacy product) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Recuento de pines | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |