EP910LC-25 vs EP910LC-35 Vergleich
Detaillierter Direktvergleich von EP910LC-25 von Intel und EP910LC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910LC-25 | EP910LC-35 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2,20 | $18,75 |
| Family | Altera Classic EPLD | Classic (EP910) |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | 35 ns |
| Dedicated Inputs | 16 | — |
| Gehäuse | 28-pin PLCC (LC suffix) | PLCC-44 (J-lead, LC suffix) |
| Montageart | Surface Mount | — |
| Technology | CMOS (EPROM-based) | CMOS EPROM |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Not applicable (legacy product) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Pin-Anzahl | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |