EP910LC-25 vs EP910LC-40T Comparación
Comparación detallada lado a lado de EP910LC-25 por Intel y EP910LC-40T por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-25 | EP910LC-40T |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,20 | $10,40 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | 40 ns |
| Dedicated Inputs | 16 | — |
| Encapsulado | 28-pin PLCC (LC suffix) | PLCC-44 (PQCC44) |
| Tipo de montaje | Surface Mount | — |
| Technology | CMOS (EPROM-based) | CMOS, UV-erasable |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | -40 C to +85 C (commercial, per -LC suffix family) |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - not stated in web data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Equivalent Gates | — | 450 gates |
| Logic Array Blocks | — | 4 Logic Expandable AND-OR arrays |
| User I/O Pins | — | 36 |
| Maximum Frequency (fMAX) | — | 25 MHz |
| Tensión de alimentación | — | 5 V (4.75 V to 5.25 V) |
| Programming | — | Altera MAX+PLUS II / APLUS tools |
| Erase/Reprogram Cycles | — | 100 (windowed UV-erase family) |
| Recuento de pines | — | 44 |
| Packaging Option | — | Tape and Reel (T suffix) |