EP910LC-30T vs EP910LC44-30T Comparación
Comparación detallada lado a lado de EP910LC-30T por Altera y EP910LC44-30T por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-30T | EP910LC44-30T |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,10 | $9,75 |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 33 ns |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | CMOS, UV-erasable / OTP | — |
| User I/O Pins | 36 | — |
| Encapsulado | 44-pin PLCC (J-lead) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature] | — |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| Estado RoHS | unknown | — |
| Lead-Free | unknown | — |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Product Terms | — | 240 |
| Dedicated Inputs | — | 12 |
| I/O Lines | — | 24 (bidirectional) |
| Total Inputs | — | 36 |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |