EP910LC-30T vs EP910LC44-30T Comparaison
Comparaison détaillée côte à côte de EP910LC-30T par Altera et EP910LC44-30T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-30T | EP910LC44-30T |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,10 | $9,75 |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 33 ns |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | CMOS, UV-erasable / OTP | — |
| User I/O Pins | 36 | — |
| Boîtier | 44-pin PLCC (J-lead) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature] | — |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| Statut RoHS | unknown | — |
| Lead-Free | unknown | — |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Product Terms | — | 240 |
| Dedicated Inputs | — | 12 |
| I/O Lines | — | 24 (bidirectional) |
| Total Inputs | — | 36 |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |