EP910LI-35T vs EP910LI-35 Comparación
Comparación detallada lado a lado de EP910LI-35T por Intel y EP910LI-35 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LI-35T | EP910LI-35 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $28,50 | $25,80 |
| Family | Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | 900 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, EPROM-based | — |
| Encapsulado | 44-pin PLCC (JEDEC) | 44-pin PLCC (J-lead) |
| Temperatura de funcionamiento | -40C to +85C (industrial, 'I' suffix) | -40 °C to +85 °C (Industrial) |
| Tipo de montaje | Surface Mount / Socket | Surface Mount |
| Programming Method | EPROM (UV-erasable for windowed versions) | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Series | — | EP910 |
| Macrocells | — | 24 |
| Maximum User I/O Pins | — | 38 |
| Propagation Delay (t_PD) | — | 35 ns |
| Maximum Counter Frequency (f_CNT) | — | 76.9 MHz |
| Tensión de alimentación | — | 5 V (4.75 V to 5.25 V) |
| Process Technology | — | CMOS EPROM |
| Programming Technology | — | EPROM (UV-erasable) |
| Erase/Program Cycles | — | ≥100 |
| Lead Pitch | — | 1.27 mm |