EP910PI-30T vs EP910PI-25 Comparación
Comparación detallada lado a lado de EP910PI-30T por Altera y EP910PI-25 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910PI-30T | EP910PI-25 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,95 | $10,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 480 | — |
| Dedicated Inputs | 10 | 12 |
| Propagation Delay (tPD) | 30 ns | — |
| Register (Clock-to-Output) Delay | 20 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V nominal |
| Technology | CMOS, UV-erasable (windowed ceramic) | — |
| Package Type | 40-pin PDIP (ceramic windowed) | — |
| Tipo de montaje | Through-Hole | Through-Hole |
| Temperatura de funcionamiento | -40 C to +85 C (industrial) | 0C to +70C (commercial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (PDIP package) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device | — | EP910 |
| I/O Pins | — | 24 |
| Pin-to-Pin Propagation Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 40 MHz |
| Process Technology | — | 5 V CMOS (EPROM-based) |
| Encapsulado | — | PDIP-40 (Plastic DIP) |
| Recuento de pines | — | 40 |
| Programmability | — | UV-erasable (windowed) / one-time-programmable |