EPC1213LC20 vs EPC1213LI20 Comparación
Comparación detallada lado a lado de EPC1213LC20 por Intel y EPC1213LI20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC1213LC20 | EPC1213LI20 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | EEPROM | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,40 | $9,75 |
| Tipo de memoria | OTP Configuration PROM (Flash-based) | OTP Configuration PROM (non-volatile) |
| Tamaño de memoria | 212 Kbit | 212 Kbit |
| Interfaz | Serial (Altera FPGA configuration protocol) | — |
| Maximum Configuration Clock | 6 MHz | — |
| Supply Voltage (Core) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5.0 V | 3.3 V or 5 V |
| Programmability | One-Time Programmable (OTP) via IEEE 1149.1 JTAG | OTP (one-time programmable) |
| In-System Programmability | Yes (5.0 V and 3.3 V ISP) | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Compression Support | Yes (FPGA decompresses bitstream during load) | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| Encapsulado | 20-PLCC (J-lead, 9x9 mm) | 20-PLCC (9x9 mm), J-lead |
| Package Code | QCCJ | — |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - legacy Altera part] |
| Tipo de interfaz | — | Serial (Altera active-serial configuration) |
| Supply Voltage (VCC) | — | 3.3 V / 5 V |
| Recuento de pines | — | 20 |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Mode | — | Active Serial (AS) |
| Internal Oscillator | — | Yes (generates DCLK to FPGA) |
| Cascade Support | — | Yes (nCASC pin for multi-device chains) |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |