EPC1213LC20 vs EPC1213LI20 Comparaison
Comparaison détaillée côte à côte de EPC1213LC20 par Intel et EPC1213LI20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1213LC20 | EPC1213LI20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | EEPROM | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,40 | $9,75 |
| Type de mémoire | OTP Configuration PROM (Flash-based) | OTP Configuration PROM (non-volatile) |
| Taille de mémoire | 212 Kbit | 212 Kbit |
| Interface | Serial (Altera FPGA configuration protocol) | — |
| Maximum Configuration Clock | 6 MHz | — |
| Supply Voltage (Core) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5.0 V | 3.3 V or 5 V |
| Programmability | One-Time Programmable (OTP) via IEEE 1149.1 JTAG | OTP (one-time programmable) |
| In-System Programmability | Yes (5.0 V and 3.3 V ISP) | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Compression Support | Yes (FPGA decompresses bitstream during load) | — |
| Température de fonctionnement | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| Boîtier | 20-PLCC (J-lead, 9x9 mm) | 20-PLCC (9x9 mm), J-lead |
| Package Code | QCCJ | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - legacy Altera part] |
| Type d'interface | — | Serial (Altera active-serial configuration) |
| Supply Voltage (VCC) | — | 3.3 V / 5 V |
| Nombre de broches | — | 20 |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Mode | — | Active Serial (AS) |
| Internal Oscillator | — | Yes (generates DCLK to FPGA) |
| Cascade Support | — | Yes (nCASC pin for multi-device chains) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |