EPC1441LC20 vs EPC1441LI20 Comparación
Comparación detallada lado a lado de EPC1441LC20 por Altera y EPC1441LI20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC1441LC20 | EPC1441LI20 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $8,10 |
| Tipo de memoria | OTP configuration PROM | OTP Configuration PROM (PROM) |
| Configuration Memory Capacity | 440 kb | — |
| Configuration Memory Capacity (Alternate Listing) | 400 kbit | — |
| Configuration Interface | Serial | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Configuration Performance | 8 MHz | — |
| Target Device | SRAM-based LUT devices and FPGAs | — |
| Programmability | One-time programmable | — |
| Encapsulado | 20-PLCC | 20-pin PLCC (J-lead, 9x9 mm) |
| Package Dimensions | 9 mm x 9 mm | — |
| Package Code | QCCJ | — |
| Package Shape | Square | — |
| Number of Terminals | 20 | — |
| Rango de temperatura de funcionamiento | 0 °C to 70 °C | — |
| Temperature Grade | Commercial | — |
| Configuration Device Family | EPC14 | — |
| Typical Use | FPGA configuration memory | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Supported FPGA Families | — | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Tensión de alimentación | — | 3.3 V |
| Temperatura de funcionamiento | — | -40 C to +85 C (industrial) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |