EPC1441LC20 vs EPC1441LI20 Comparaison
Comparaison détaillée côte à côte de EPC1441LC20 par Altera et EPC1441LI20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1441LC20 | EPC1441LI20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $8,10 |
| Type de mémoire | OTP configuration PROM | OTP Configuration PROM (PROM) |
| Configuration Memory Capacity | 440 kb | — |
| Configuration Memory Capacity (Alternate Listing) | 400 kbit | — |
| Configuration Interface | Serial | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Configuration Performance | 8 MHz | — |
| Target Device | SRAM-based LUT devices and FPGAs | — |
| Programmability | One-time programmable | — |
| Boîtier | 20-PLCC | 20-pin PLCC (J-lead, 9x9 mm) |
| Package Dimensions | 9 mm x 9 mm | — |
| Package Code | QCCJ | — |
| Package Shape | Square | — |
| Number of Terminals | 20 | — |
| Plage de température de fonctionnement | 0 °C to 70 °C | — |
| Temperature Grade | Commercial | — |
| Configuration Device Family | EPC14 | — |
| Typical Use | FPGA configuration memory | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Supported FPGA Families | — | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Tension d'alimentation | — | 3.3 V |
| Température de fonctionnement | — | -40 C to +85 C (industrial) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |