EPC1LC120 vs EPC1L20 Comparación
Comparación detallada lado a lado de EPC1LC120 por Altera y EPC1L20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC1LC120 | EPC1L20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,30 | $3,75 |
| Tipo de memoria | Serial Configuration Memory (Flash-based, non-volatile) | OTP Configuration PROM (Flash) |
| Memory Density | 1 Mbit | — |
| Serial Clock Frequency (DCLK) | 8 MHz | — |
| Supported FPGA Families | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class | — |
| Interfaz | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | Serial / FPP configuration + JTAG (IEEE 1149.1) |
| Encapsulado | LQFP-120 (Low-profile Quad Flat Pack) | 20-pin PLCC (9x9 mm) |
| Tipo de montaje | Surface Mount | Through-Hole / Socket |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Tensión de alimentación | [DATA_NEEDED: VCC range] | 3.3 V (typical) |
| Programming | Factory / JTAG via Altera programming tools | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Configuration Mode | Serial configuration of SRAM-based FPGAs | — |
| Compatible Bitstream Width | Serial | — |
| Tamaño de memoria | — | 1 Mbit |
| Configuration Clock (max) | — | 8 MHz |
| Flash Access Time | — | 90 ns (approx.) |
| Max Read Bandwidth | — | 160 Mbps (16-bit DQ bus) |
| Programmability | — | One-Time Programmable (OTP) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| JTAG / ISP Support | — | Yes (IEEE 1149.1) |
| Compatible FPGA Series | — | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families |