EPC1LC120 vs EPC1L20 Comparaison
Comparaison détaillée côte à côte de EPC1LC120 par Altera et EPC1L20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1LC120 | EPC1L20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,30 | $3,75 |
| Type de mémoire | Serial Configuration Memory (Flash-based, non-volatile) | OTP Configuration PROM (Flash) |
| Memory Density | 1 Mbit | — |
| Serial Clock Frequency (DCLK) | 8 MHz | — |
| Supported FPGA Families | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class | — |
| Interface | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | Serial / FPP configuration + JTAG (IEEE 1149.1) |
| Boîtier | LQFP-120 (Low-profile Quad Flat Pack) | 20-pin PLCC (9x9 mm) |
| Type de montage | Surface Mount | Through-Hole / Socket |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Tension d'alimentation | [DATA_NEEDED: VCC range] | 3.3 V (typical) |
| Programming | Factory / JTAG via Altera programming tools | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Configuration Mode | Serial configuration of SRAM-based FPGAs | — |
| Compatible Bitstream Width | Serial | — |
| Taille de mémoire | — | 1 Mbit |
| Configuration Clock (max) | — | 8 MHz |
| Flash Access Time | — | 90 ns (approx.) |
| Max Read Bandwidth | — | 160 Mbps (16-bit DQ bus) |
| Programmability | — | One-Time Programmable (OTP) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| JTAG / ISP Support | — | Yes (IEEE 1149.1) |
| Compatible FPGA Series | — | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families |