EPC1LC20N vs EPC1LC20U Comparación
Comparación detallada lado a lado de EPC1LC20N por Intel y EPC1LC20U por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC1LC20N | EPC1LC20U |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,40 | $9,75 |
| Tipo de memoria | OTP Configuration PROM (EPROM-based) | OTP (One-Time-Programmable) Configuration PROM |
| Tamaño de memoria | 1 Mbit | — |
| Programmable Type | OTP (One-Time Programmable) | — |
| Configuration Clock Frequency | 16.7 MHz | — |
| Supply Voltage - VCCINT | 4.75 V to 5.25 V | — |
| Supply Voltage - VCCIO | 3.0 V to 3.6 V | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | [DATA_NEEDED: industrial/commercial grade range] |
| Encapsulado / Carcasa | 20-LCC (J-Lead), PLCC-20 | — |
| Package Dimensions | 9 mm x 9 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Packaging | Tube | — |
| Configuration Interface | Serial (DATA, DCLK, nCONFIG, nSTATUS) | Altera Serial Configuration (4-wire) |
| Supported FPGA Families | Altera FLEX, APEX, ACEX, Mercury | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant (Pb-free finish, "U" suffix) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Memory Density | — | 1 Mbit |
| Maximum DCLK Frequency | — | 8 MHz |
| Encapsulado | — | 20-pin PLCC (9x9 mm) |
| Operating Voltage (VCC) | — | 3.3 V typical [DATA_NEEDED: full range] |
| Configuration Time | — | [DATA_NEEDED: depends on bitstream length and DCLK] |
| Cascading Support | — | Yes (multi-PROM daisy-chain for larger bitstreams) |
| Programming Method | — | Altera APU / third-party JTAG programmer |
| Lead-Free (Pb-free) Finish | — | Yes ("U" suffix) |
| Compatibility | — | Altera SRAM-based LUT FPGAs (APEX, FLEX, ACEX, Cyclone, Stratix families) |
| Nivel MSL | — | [DATA_NEEDED] |