EPC1PCB vs EPC1LI20 Comparación
Comparación detallada lado a lado de EPC1PCB por Intel y EPC1LI20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC1PCB | EPC1LI20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | Memory ICs |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,60 | $8,50 |
| Product Type | Enhanced Configuration Device for SRAM-based FPGAs | — |
| Memory Density | 1 Mbit | — |
| Program Memory Type | Flash (non-volatile) | — |
| Configuration Modes Supported | FPP (Fast Passive Parallel), PS (Passive Serial) | — |
| Supply Voltage VCC | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V tolerant | — |
| Supported FPGA Families | APEX, FLEX, ACEX, Cyclone, Stratix | — |
| Interfaz | Altera configuration bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Multi-Device Daisy Chain | Yes (nCASC, nCS pins) | — |
| Programming Interface | JTAG (IEEE 1149.1 boundary scan) | — |
| In-System Programmable | Yes | — |
| Program/Erase Endurance | [DATA_NEEDED: program/erase cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Encapsulado | PLCC-20 (Plastic Leaded Chip Carrier) | 20-pin PLCC (J-lead, 9x9 mm) |
| Tipo de montaje | Surface Mount (socket-compatible) | Surface Mount (PLCC socket compatible) |
| Estado RoHS | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| Tipo de memoria | — | OTP Configuration PROM (EPROM-based) |
| Tamaño de memoria | — | 1 Mb (1,048,576 bits) |
| Configuration Interface | — | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Recuento de pines | — | 20 |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Nivel MSL | — | 1 (per Partstack datasheet record) |