EPC1PCB vs EPC1LI20 Perbandingan
Perbandingan bersamaan detil EPC1PCB dari Intel dan EPC1LI20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC1PCB | EPC1LI20 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | NRND | Obsolete |
| Product Type | Enhanced Configuration Device for SRAM-based FPGAs | — |
| Memory Density | 1 Mbit | — |
| Program Memory Type | Flash (non-volatile) | — |
| Configuration Modes Supported | FPP (Fast Passive Parallel), PS (Passive Serial) | — |
| Supply Voltage VCC | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V tolerant | — |
| Supported FPGA Families | APEX, FLEX, ACEX, Cyclone, Stratix | — |
| Antarmuka | Altera configuration bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Multi-Device Daisy Chain | Yes (nCASC, nCS pins) | — |
| Programming Interface | JTAG (IEEE 1149.1 boundary scan) | — |
| In-System Programmable | Yes | — |
| Program/Erase Endurance | [DATA_NEEDED: program/erase cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Paket | PLCC-20 (Plastic Leaded Chip Carrier) | 20-pin PLCC (J-lead, 9x9 mm) |
| Tipe Mounting | Surface Mount (socket-compatible) | Surface Mount (PLCC socket compatible) |
| Status RoHS | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| Tipe Memori | — | OTP Configuration PROM (EPROM-based) |
| Ukuran Memori | — | 1 Mb (1,048,576 bits) |
| Configuration Interface | — | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Jumlah Pin | — | 20 |
| Suhu Kerja | — | [DATA_NEEDED: operating temperature range] |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Level MSL | — | 1 (per Partstack datasheet record) |