EPC21LC20 vs EPC22LC20 Comparación
Comparación detallada lado a lado de EPC21LC20 por Intel y EPC22LC20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC21LC20 | EPC22LC20 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | Memory ICs | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $4,10 |
| Tipo de memoria | Serial Configuration PROM (Flash-based, in-system programmable) | — |
| Density | 2 Mb (2,097,152 bits) | — |
| Configuration Mode Supported | Serial (PS) for Altera SRAM-based LUT FPGAs | — |
| Maximum DCLK Frequency | 10 MHz | — |
| Access Time | approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] | — |
| Programming Interface | IEEE 1149.1 (JTAG) | JTAG (IEEE 1149.1 / IEEE 1532) |
| Program/Erase Endurance | 100 cycles minimum [DATA_NEEDED: confirm from datasheet] | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Standby Current | [DATA_NEEDED: ICCSB value] | — |
| Active Read Current | [DATA_NEEDED: ICC active current] | — |
| Operating Temperature (commercial) | 0 °C to +70 °C (LC suffix) | — |
| Operating Temperature (industrial) | [DATA_NEEDED: -40 to +85 °C for LI variant] | — |
| Encapsulado / Carcasa | 20-pin PLCC (J-lead, JEDEC MS-018) | 20-LCC (J-Lead, 9 x 9 mm) |
| Tipo de montaje | Surface Mount (PLCC socket or solder) | Surface Mount (PLCC socket compatible) |
| Nivel MSL | [DATA_NEEDED: confirm moisture sensitivity level] | — |
| Estado RoHS | [DATA_NEEDED: confirm from Altera product page] | — |
| Lead-Free (Pb-free) | [DATA_NEEDED: confirm] | — |
| Compatible FPGA Families | ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) | — |
| JTAG Boundary-Scan Compliant | Yes (IEEE Std 1149.1) | — |
| Data Width | 1 bit (serial DATA output) | — |
| Función | — | In-System Programmable Configuration PROM for SRAM-based FPGAs |
| Tamaño de memoria | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (IEEE 1532 / Jam STAPL) |
| Supply Voltage - Low Range | — | 3.0 V to 3.6 V |
| Supply Voltage - High Range | — | 4.75 V to 5.25 V |
| Supported FPGA Families | — | ACEX 1K, APEX II, APEX 20K, FLEX 10K |
| Configuration Interface | — | Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE) |
| Packaging | — | Tube |
| Temperatura de funcionamiento | — | 0 C to +70 C (commercial) |
| Minimum DC Input Voltage | — | -0.3 V |
| Input Overshoot Tolerance | — | 7.0 V for <100 mA, <20 ns no-load |
| Input Undershoot Tolerance | — | -2.0 V for <100 mA, <20 ns no-load |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status not in verified data] |