EPC2L1696-10F vs EPC2L120 Comparación
Comparación detallada lado a lado de EPC2L1696-10F por Altera y EPC2L120 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2L1696-10F | EPC2L120 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $5,20 |
| Device Type | Configuration EPROM for SRAM-based LUT FPGAs | — |
| Supported Logic Density | 1696 LUTs | — |
| Configuration Interface | 5-pin Altera serial (nCS, DCLK, DATA, OE, nINIT_CONF) | Serial, FPGA-targeted |
| Memory Technology | CMOS EEPROM | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Access Time | 10 ns (speed grade -10) | — |
| Maximum DCLK Frequency | [DATA_NEEDED: DCLK max frequency] | — |
| Program / Erase Cycles | >= 100,000 cycles | — |
| Data Retention | [DATA_NEEDED: data retention years] | 20 years (per Altera datasheet family) |
| In-System Programming | Yes (4-wire JTAG-style interface) | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | -40 C to +85 C |
| Encapsulado | 20-pin PLCC | PLCC-20 |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Tipo de memoria | — | Configuration PROM (Flash-based) |
| Density | — | 120 Kbit |
| Operating Voltage | — | 2.7 V to 3.6 V (3.3 V typ) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Compatible FPGAs | — | Altera Cyclone, Cyclone II, APEX-series |
| CONF_DONE Output | — | Open-drain, wire-OR capable |
| Program/Erase Cycles | — | 100 cycles minimum |
| Lead-Free | — | unknown |
| Family | — | EPC2 (Enhanced Configuration) |