EPC2L1696-10F vs EPC2L120 对比

详细并排对比 EPC2L1696-10F 出自 Altera 和 EPC2L120 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2L1696-10F EPC2L120
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.00 $5.20
Device Type Configuration EPROM for SRAM-based LUT FPGAs —
Supported Logic Density 1696 LUTs —
Configuration Interface 5-pin Altera serial (nCS, DCLK, DATA, OE, nINIT_CONF) Serial, FPGA-targeted
Memory Technology CMOS EEPROM —
Supply Voltage (VCC) 3.3 V —
Access Time 10 ns (speed grade -10) —
Maximum DCLK Frequency [DATA_NEEDED: DCLK max frequency] —
Program / Erase Cycles >= 100,000 cycles —
Data Retention [DATA_NEEDED: data retention years] 20 years (per Altera datasheet family)
In-System Programming Yes (4-wire JTAG-style interface) —
工作温度 0C to +70C (commercial) -40 C to +85 C
封装 20-pin PLCC PLCC-20
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status] unknown
存储器类型 — Configuration PROM (Flash-based)
Density — 120 Kbit
Operating Voltage — 2.7 V to 3.6 V (3.3 V typ)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Compatible FPGAs — Altera Cyclone, Cyclone II, APEX-series
CONF_DONE Output — Open-drain, wire-OR capable
Program/Erase Cycles — 100 cycles minimum
Lead-Free — unknown
Family — EPC2 (Enhanced Configuration)

数据手册与资源

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