EPC2L20 vs EPC2L20U-HAF480119C Comparación
Comparación detallada lado a lado de EPC2L20 por Altera y EPC2L20U-HAF480119C por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPC2L20U-HAF480119C - FPGA Config Device, SRAM LUT | Intel
EPC2L20U-HAF480119C ⚠ Última compraComparación de especificaciones
| Parámetro | EPC2L20 | EPC2L20U-HAF480119C |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $25,80 | $10,75 |
| Tipo de memoria | Configuration PROM (non-volatile) | Configuration PROM (non-volatile) |
| Tamaño de memoria | 1.6 Mbit | 1.6 Mb |
| Organización de memoria | 8-bit byte | — |
| Interfaz | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) | — |
| Programmability | In-system programmable via JTAG | In-system programmable via JTAG |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (VCCSEL selectable) | — |
| Cascade Support | Yes - multi-device daisy chain | Yes (multi-PROM chains for larger FPGAs) |
| Boundary Scan | JTAG IEEE 1149.1 BST | — |
| Encapsulado | 20-pin PLCC (J-lead) | PLCC-20 |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount / Socketed |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | RoHS Compliant (per IC Components listing) | [DATA_NEEDED: RoHS status] |
| Process Technology | Low-power CMOS | — |
| Target FPGAs | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix | — |
| Target Device | — | SRAM-based LUT FPGAs (Cyclone, Stratix, APEX families) |
| Core Supply Voltage | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant |
| Configuration Modes | — | Serial (1-bit), Parallel (8-bit FPP), JTAG |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Configuration Clock Range | — | 10 MHz to 40 MHz |
| Bitstream Compression Support | — | Yes (Cyclone/Stratix compressed bitstreams) |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |